发明名称 SYSTEM FOR CONTROLLING ORDER OF MICROPROGRAM
摘要 PURPOSE:To branch a microprogram without delaying the instruction executing time of central control equipment, by installing a means which selects an address to be inputted into a control memory out of plural addresses. CONSTITUTION:A micro-instruction address converting circuit MAC' can store four kinds of addresses (a) of M0-M3 correspondingly to one functioning section (f) for instruction to be executed. One which is assigned by the counted output (c) of a counting circuit MJC which is step-advanced by a branching signal j1 contained in a micro-instruction i1' extracted from a control memory CM, is outputted. Therefore, branched addresses a2, etc., of up to three pieces of the micro-instruction i1' accumulated in a micro-instruction register CMIR can be obtained from the micro-instruction address converting circuit MAC', by outputting the branching signal j1 while a prescribed logical operation circuit is controlled.
申请公布号 JPS59174947(A) 申请公布日期 1984.10.03
申请号 JP19830049799 申请日期 1983.03.25
申请人 FUJITSU KK 发明人 WATANABE MINORU;GOUUKON KAZUHIKO;OSADA TAKATOSHI;SHIBATA YUUJI
分类号 G06F9/22;G06F9/26;G06F9/28;G06F9/38 主分类号 G06F9/22
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