发明名称 CIRCUIT FOR DETECTING MODE OF TRANSFER REQUEST SIGNAL
摘要 PURPOSE:To discriminate the mode of a transfer request signal, by making a counter counter counting operation by a read or write signal, and comparing the counted number with a data transferred number. CONSTITUTION:When a data transfer request signal DRQ, write signal W, or read signal R is impressed upon an interface controlling device 2, a counter 10 makes count-up. In the case of first-in-first-out mode (FiFo mode), therefore, an input-output device operates under the FiFo mode when the number of data transfer byte is many, by comparing the data transfer byte number with the counted value of the counter 10. Moreover, under a normal mode, the number of times of the data transfer request signal DRQ is reduced to the same as the number of data transfer bytes. Therefore, the counted value of the counter 10 becomes the same as the number of data transfer bytes and, by comparing them with each other in the same way, the transfer mode is discriminated.
申请公布号 JPS59174939(A) 申请公布日期 1984.10.03
申请号 JP19830050220 申请日期 1983.03.25
申请人 FUJITSU KK 发明人 MIYAGI TAKEHISA
分类号 G06F13/00;G06F3/00;G06F13/38 主分类号 G06F13/00
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