| 摘要 |
<p>PURPOSE:To keep synchronization between the transmission side and the receiving side at the transfer of continuous serial data and to protect the transfer data by providing a receiving clock stopping circuit and a low level detecting circuit. CONSTITUTION:At the time of a transmission mode, parallel data from a parallel data bus 2 are written in a data buffer 6. When data in a shift register 5 are cleared, the data stored in the data buffer 6 are written in a shift register 6. When a transmission signal and a synchronous clock line are temporally held at the low level, the low level detecting circuit 15 outputs a transmission clock stopping signal, so that the generation of a synchronous clock from a clock generating circuit 13 is stopped and data transmission is interrupted. At the time of the receiving mode, the data buffer 6 and the shift register 5 are filled with data, a receiving clock stopping circuit 14 keeps the synchronous clock line 3 at the low level potential. Consequently, the transmission side stops a transmission clock.</p> |
