发明名称 APPRECIATING DEVICE OF COMPUTER
摘要 PURPOSE:To perform easily appreciation with small deviation by storing successively microinstruction address corresponding to the address number of a memory for measuring, and measuring the microinstruction address dispersedly while counting the number of times of storing. CONSTITUTION:The computer appreciating device is provided with a trigger signal generating circuit 1, memory for measuring 2, memory address register for measuring 3 and an adder 4. Microinstruction address is read out from a microinstruction address register 7 each time trigger signal having random period is generated, and stored in the memory 2 for measuring. The adder 4 counts the number of times of storing, and when the number of times of storing arrives at preset number of times, and microinstruction code stored in the memory 2 for measuring overflows, this is detected and sending out of the adder output is stopped or stopped and additing action is brought into waiting state until next measuring.
申请公布号 JPS59173858(A) 申请公布日期 1984.10.02
申请号 JP19830048238 申请日期 1983.03.23
申请人 NIPPON DENKI KK 发明人 SHIBAZAKI SUSUMU
分类号 G06F11/34;(IPC1-7):G06F11/34 主分类号 G06F11/34
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