发明名称 BUS CONTROL SYSTEM
摘要 PURPOSE:To simplify an access control circuit by extending bus using permission by a waiting signal from a waiting control circuit when an access to a hardware unit other than a unit group is requested. CONSTITUTION:The unit groups 1-N are connected to a bus A. Each of the unit groups 1-N is constituted of a lower bus B, units 11-1M connected to the lower bus B, an access control circuit D, and a bus control circuit E. The bus control circuit E responds to the using requests from the respective units 11-1M to the bus B in accordance with the previously fixed priority, supplies using permission to the units 11 1M, and when the bus using request indicates the access to a hardware unit other than the unit groups, extends the bus using permission in accordance with an output of the waiting control circuit outputting a waiting signal. The waiting signal is ended in interlocking with the execution of the access.
申请公布号 JPS59173823(A) 申请公布日期 1984.10.02
申请号 JP19830049259 申请日期 1983.03.24
申请人 NIPPON DENKI KK 发明人 IGUCHI KOUJI
分类号 G06F13/362;G06F3/00 主分类号 G06F13/362
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