发明名称 Process for forming self-aligned complementary source/drain regions for MOS transistors
摘要 Improved CMOS processing steps for forming p-type and n-type source and drain regions. A photoresist mask is used to expose one transistor type to allow the formation of source and drain regions of a first conductivity type. Then an oxidation step is used to grow an oxide over the substrate; this oxide grows more quickly over the doped source and drain regions. Ion implantation is used to implant ions of the second conductivity type through the thin oxide while the thicker oxide blocks these ions. Thus, the complementary source and drain regions are formed with a single masking step and without counter doping.
申请公布号 US4474624(A) 申请公布日期 1984.10.02
申请号 US19820397055 申请日期 1982.07.12
申请人 INTEL CORPORATION 发明人 MATTHEWS, JAMES A.
分类号 H01L27/08;H01L21/266;H01L21/8238;H01L29/78;(IPC1-7):H01L21/26 主分类号 H01L27/08
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