发明名称 PROCESSOR ADDITIONAL DEVICE
摘要 PURPOSE:To detect many address passages with a small-sized circuit constitution by utilizing a PLA (programmable logic array) element as an address information coincidence detecting circuit. CONSTITUTION:Address data is inputted to an input information latch register 20 of the PLA by an address output timing extracting circuit 18. Its information is compared with plural trigger address groups which are preliminarily programmed in an AND array part 21. If a programmed trigger address coincides with input address data, the signal is sent to an OR array part 22. Counter number information of the OR array part 22 is inputted together with an interrupt signal 26 to an attached processor 24 which executes the postprocessing. On the side of the attached processor 24, the counter number is inputted when the interrupt signal 26 is inputted. Then, a counter set in a memory 25 of the processor 24 itself is counted up.
申请公布号 JPS59172047(A) 申请公布日期 1984.09.28
申请号 JP19830046042 申请日期 1983.03.22
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 HONDA TAKASHI;OOYAMA SHIGERU;ICHIKAWA HIROYUKI
分类号 G06F11/34;G06F15/16;G06F15/177 主分类号 G06F11/34
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