发明名称 JOSEPHSON LARGE SCALE INTEGRATED CIRCUIT
摘要 PURPOSE:To obtain wiring structure in which the characteristic impedance Z0 of wirings hardly varies in a Josephson LSI by forming insulating layers to sections except a section connecting the wirings at all times and making the thickness of the insulating layers in a device section and a wiring region the same. CONSTITUTION:An insulating layer 106 is used substantially as one contributing to the characteristic impedance Z0 of a wiring on an interferometer 100, an anodic oxidation film 108 and insulating layers 109, 110 on a grand plane 107 are employed in a wiring region, and the thickness of both the insulating layer 106 and the insulating layers 109, 110 can be made approximately the same. An insulating layer such as the insulating layer 110 is constituted by an insulating layer 111 used for preparing a junction, and the film thickness of the insulating layer 106 and the anodic oxidation film 108 and the insulating layers 109, 110 is arranged by adjusting film thickness. Or when the insulating layer 106 is made larger than the insulating layers 108, 109, a difference between characteristic impedance Z0 is reduced extremely even when the insulating layer 110 is constituted by the insulating layer 106. Consequently, characteristic impedance Z0 on the interferometer and one Z0 in the wiring region are made approximately the same, variance is reduced, and Z0 is made the same. Accordingly, signal currents are hardly reflected, and the operation of an LSI is stabilized.
申请公布号 JPS59172281(A) 申请公布日期 1984.09.28
申请号 JP19830044431 申请日期 1983.03.18
申请人 KOGYO GIJUTSUIN (JAPAN) 发明人 YAMASHITA KUNIO;HARADA YUTAKA;NAKANE HIDEAKI;KODERA NOBUO;KAWABE USHIO
分类号 H01L39/22;H01L39/06 主分类号 H01L39/22
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