发明名称 INPUT CIRCUIT
摘要 PURPOSE:To make the operating permissible range by level ''1'' of input information hardly be changed even when a Vcc level is low or high by connecting a source of a depletion transistor (TR) to a drain of an enhancement TR of an input circuit having a conventional hysteresis characteristic. CONSTITUTION:When a level of an input terminal A is a threshold voltage of an enhancement TRQ2 or below with the level of the input terminal A transitted from ''0'' to ''1'', a TRQ3 is also turned off and an output terminal N1 of an E/D inverter is at level ''1''. The difference from a conventional circuit resides in that a source and a gate of a depletion TRQ6 being a constant current TR are connected to a drain of an enhancement TRQ5 being the 2nd driving circuit, a drain of a depletion TRQ6 is connected to a Vcc, thereby making hardly changed the operating permissible range of input information level ''1'' at the input terminal A depending on the difference of the level of the Vcc.
申请公布号 JPS59171310(A) 申请公布日期 1984.09.27
申请号 JP19830045475 申请日期 1983.03.18
申请人 NIPPON DENKI KK 发明人 KOJIMA MICHIAKI
分类号 H03K3/0233;H03K3/3565 主分类号 H03K3/0233
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