发明名称 FREQUENCY CONTROL CIRCUIT OF TUNER
摘要 PURPOSE:To suppress disturbance due to oscillating signals of the 1st and 2nd local oscillators by frquency-dividing an output signal of the 1st and 2nd local oscillators and using the difference between the frequency-divided signal frequencies so as to control the oscillating frequency of the 1st local oscillator by a PLL circuit. CONSTITUTION:In Figure, 19 is a frequency divider frequency-dividing an output signal of the 1st local oscillator 8, 20 is a frequency divider fequency-dividing an output sigal of the 2nd local oscillator 9, and 21 is a fequency synthesizer so as to synthesize the output signal of the frequency dividers 19 and 20. In setting the 1st IF frequency to nearly 3GHz, 1/2-frequency-division is most suitable for the frequency dividers 19, 20 and the occurrence of disturbance is less frequent. The frequency-division allows to suppress a disturbing signal easily and the constitution of the frequency synthesizer 21 is simplified, and it is also possible to constitute the circuit by an LPF only. In the Figure, 17 is a reference oscillator and 21 is the frequency synthesizer.
申请公布号 JPS59171309(A) 申请公布日期 1984.09.27
申请号 JP19830044123 申请日期 1983.03.18
申请人 HITACHI SEISAKUSHO KK 发明人 SAITOU TAKESHI;NAGASHIMA TOSHIO
分类号 H03J7/28;H03J5/02;H04B1/26 主分类号 H03J7/28
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