发明名称 DISPLAY CIRCUIT
摘要 PURPOSE:To realize non-interlace display without using a high speed RAM or the like by writing a interlace display data in a buffer memory at each horizontal period and reading it twice repetitively for each horizontal period in a double speed at write to apply the signal to a picture tube. CONSTITUTION:A converter 20 is inserted between an IF circuit 18 and a video circuit 2. Signals ADWR, WRX, RDX are applied to a memory (22A) at every other horizontal period on an interlace (ITL) screen, signals R-Y from the IF18 are written in the memory 22A, signals ADRD, WRY, RDY are applied to a memory 22B and then the signals R-Y of the memory 22B are read. Since the signal ADRD is changed in a speed twice that of the signal ADWR and repeats the same address twice at one horizontal period of the ITL screen for each 1/2 horizontal period, the signals R-Y for this period's share are read repetitively twice in double speed at one horizontal period of the ITL screen. Further, the signals R-Y from the memory 22B are applied to the video circuit 2. The W/R of the memories 22A, 22B is inverted at each other remaining horizontal period.
申请公布号 JPS59171375(A) 申请公布日期 1984.09.27
申请号 JP19830046453 申请日期 1983.03.18
申请人 SONY KK 发明人 MAEDA SATORU
分类号 H04N5/445;(IPC1-7):H04N5/44 主分类号 H04N5/445
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