| 摘要 |
PURPOSE:To attain signal processing so as to hold framing by feeding back a frame pulse to a digital signal processing circuit of the pre-stage capable of synchronism from a D/A converter. CONSTITUTION:Video information included in data in the operation is processed by digital signal processing circuits 3-6. So far as at least one of the circuits 3-6 has a function of frame synchronism, the entire delay amount is made automatically equal to the total frame numbers by a frame pulse FP fed back from the D/A converter 7 to the circuits 6-3 connected in series. The pulse FP is fed back to each pre-stage by the circuits 6-3, at least one of the circuits 3-6 has the synchronizing capability and its output is locked to the pulse FP.
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