发明名称 |
Frequency dividing ratio setting device for programmable counters |
摘要 |
A frequency dividing ratio setting device capable of successively changing the frequency dividing ratio of a programmable counter and further changing the changed portion of the frequency dividing ratio is provided. The device comprises a circuit for generating a pulse signal corresponding to predetermined data, an adder-subtracter having first and second input terminals and adding or subtracting data supplied to first and second input terminals thereof, said first input terminal being connected to the output terminal of the pulse signal generating circuit, and a shift register to which an output signal is supplied from the adder-subtracter and supplying an input signal to a program terminal of the programmable counter and to the second input terminal of the adder-subtracter.
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申请公布号 |
US4473885(A) |
申请公布日期 |
1984.09.25 |
申请号 |
US19810267925 |
申请日期 |
1981.05.28 |
申请人 |
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA |
发明人 |
KAMIMARU, NOBUYUKI;SUZUKI, HIROAKI |
分类号 |
H03K23/66;(IPC1-7):H03K21/36 |
主分类号 |
H03K23/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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