发明名称 INPUT CIRCUIT
摘要 PURPOSE:To obtain stably an output corresponding to each logicall state by connecting each input of plural logical circuits having a different logical threshold value to one input terminal so as to input >=3 of logical states. CONSTITUTION:Each input of plural logical circuits 11, 12 having a different logical threshold value is connected to an input terminal IN. Then, each output of the plural logical circuits 11, 12 is connected to output terminals OUT I and OUTII. Then, the logical state corresponding to an input voltage applied to the input terminal IN is obtained by the number being the number of logical circuits added by 1. Since >=3 of logical states are inputted from one input terminal in this way, the number of input terminals of an integrated circuit is reduced.
申请公布号 JPS59168723(A) 申请公布日期 1984.09.22
申请号 JP19830041679 申请日期 1983.03.14
申请人 NIPPON DENKI KK 发明人 OBATA HIROYUKI
分类号 H03K19/20;H03K19/094 主分类号 H03K19/20
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