发明名称 TEST SET FOR LARGE SCALE INTEGRATED CIRCUIT
摘要 PURPOSE:To determine acceptables or defectives at high speed by sharing a chip defective display means for displaying the result of decision on the acceptables or defectives of LSI chips in each LSI chip regarding a speech synthesizer constituted by two chips. CONSTITUTION:Data from each LSI chip 1, 2 of a first LSI chip 1 synthesizing speeches in response to a control input and a second LSI chip 2 controlling speeches to be synthesized are read and compared and verified with a standard data separately and independently by an SPU 14 and a CPU15, and the addresses and error codes of the addresses are made contain into memory boards 22, 24 when the discordance of the data is detected. When check operation by the CPU14 and the CPU16 is completed, an MPU13 reads the error codes made contain in each memory board 22, 24, and a defective chip is displayed by a display means such as a CRT17 regarding a chip in which there is the discordance of a data.
申请公布号 JPS59168649(A) 申请公布日期 1984.09.22
申请号 JP19830043350 申请日期 1983.03.15
申请人 MATSUSHITA DENKO KK 发明人 KURODA MINORU;KUNISAWA KANJI;ITOYAMA HIROSHI
分类号 G10L19/00;H01L21/66 主分类号 G10L19/00
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