发明名称 INPUT AND OUTPUT CONTROLLER
摘要 PURPOSE:To control input/output equipment without the intervention of a CPU and speed up processing by providing a multiaccess bus which connects respective I/O controllers independently of a CPU and performing input/output control. CONSTITUTION:The multiaccess bus 3 which connects the I/O controllers 4-6 is added to the constitution including a CPU1, the I/O controllers 4-6, I/Os 10-20, a CPU bus 2 connecting them, and I/O buses 7-8. For example, an input/output controller consists of a CPU bus controller 41, multiaccess bus controller 42, I/O processor 43 connected to those two controllers, and I/O driver 44 which drives the I/Os. Consequently, the CPU bus 2 is used normally to interchange information between input/output controllers according to contents indicated by the CPU1 as a master, and the bus 3 allows the processor 43 of the input/output controller to serve as either the master or slave.
申请公布号 JPS59165119(A) 申请公布日期 1984.09.18
申请号 JP19830039007 申请日期 1983.03.11
申请人 HITACHI SEISAKUSHO KK 发明人 OGAWA HARUKI
分类号 G05B15/02;G06F3/00;G06F13/36;G06F15/16;G06F15/17 主分类号 G05B15/02
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