发明名称 SIGNAL PROCESSING UNIT
摘要 PURPOSE:To attain stable operation at all times by providing an amplitude limit circuit limiting the amplitude of an input signal to a value below the operating power supply voltage so as to limit its input signal when an excessive input signal is applied. CONSTITUTION:When a signal Vin to be processed is applied to a signal input terminal 1, the operating state of transistors (TR) 10, 11 depends on the relation of amplitude between said Vin and the base voltage of the TR11, that is, a voltage V3 of a DC voltage source 13. When Vin<<V3 at first, the TR10 is turned on and the TR11 is turned off and a voltage V0 produced at a common emitter connecting point of the TRs 10, 11 is expressed as V0=Vin+VEB10, where VEB10 is an emitter-base forward voltage of the TR10 and its value is nearly 0.7V. When Vin<<V3, the TR10 is turned off and the TR11 is turned on, and the voltage V0 in this case is expressed as V0=V3+VEB11, where VEB11 is an emitter-base forward voltage of the TR11 and this value is also nearly 0.7V.
申请公布号 JPS59163909(A) 申请公布日期 1984.09.17
申请号 JP19830037650 申请日期 1983.03.08
申请人 MATSUSHITA DENKI SANGYO KK 发明人 UDAGAWA HITOSHI;KATSUYAMA TAKASHI
分类号 H03G11/00 主分类号 H03G11/00
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