| 摘要 |
PURPOSE:To give the cell high speed function and enable memory holding at low power consumption by enabling to design small holding current and large reading current. CONSTITUTION:This memory cell 1 is a flip-flop that makes NPN transistors QN1, QN2 active transistors, and PNP transistors QP1, QP2 and resistances R1, R2 load, and memory holding, reading and writing can be made under the same bias condition with conventional ECL type memory cell. When memory holding, holding current IH is applied to a word minus line 4. When reading, the word plus line 4 is made -0.8V (selecting state), and reading current IR is applied to a pair of bit lines, and 1.3V is impressed to R/W terminals 7, 8. When writing, voltage of R/W terminal 7 or 8 is made less than -1.6V under selecting state. Holding condition of the circuit is determined only by current amplification factor of the transistors, and writing and reading conditions are determined by resistance, and can be designed independently. |
