发明名称 SERIES SEQUENTIAL TRANSMITTER
摘要 PURPOSE:To eliminate the need for a synchronizing signal allowing to attain miniaturization and to improve the fidelity by arranging in two stages combinations of selecting means having a priority function and a memory and erasing a receiving data stored in synchronizing with the transmission period. CONSTITUTION:Plural receiving data generated occassionally are stored tentatively in a buffer memory 1 and a selecting means 1 gives the 1st order priority. A buffer memory 2 stores tentatively the receiving data selected by the means 1 and a selecting means 2 gives the 2nd priority over the data in the memory 2. In transmitting the data to the next stage, the data in the memories 1, 2 are erased in synchronizing with the period of transmission. As a result, the transmission in synchronizing with an optical period of transmission required by devices of the next stage is attained, thereby permitting the need to be eliminated for the synchronizing signal, then the circuit is simplified and miniaturization is attained. Further, correspondence to very receiver at the next stage is attained easily.
申请公布号 JPS59158655(A) 申请公布日期 1984.09.08
申请号 JP19830033545 申请日期 1983.03.01
申请人 MATSUSHITA DENKI SANGYO KK 发明人 MIHARA MASATAKA
分类号 H04L29/02;H04L13/00;H04L29/06;H04L29/10;H04Q9/00 主分类号 H04L29/02
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