| 摘要 |
PURPOSE:To obtain a high-speed, inexpensive balanced modulation circuit which suits to IC-implementation by using an EOR (exclusive OR) circuit of ECL (emitter coupled logic) which is a high-speed standard logical element. CONSTITUTION:An element 1 is an EOR as an ECL logical element, and all internal transistors (TR) are used in unsaturated states for high-speed operation; and this circuit has the circuit constitution of an analog multiplier and operates as a high-speed analog multiplier by setting an input signal level to the input signal lelvel (about -0.8--1.8 V) of the ECL. For this purpose, a modulating signal is used as a signal to an input terminal 5 and a carrier is inputted as a signal to an input terminal 6; and they are converted by level converting circuits 7 and 8 to ECL levels and applied to input terminals 2 and 3, so that a signal after balanced modulation appears at an output termial 4. |
