发明名称 SYSTEM RESETTING METHOD
摘要 <p>PURPOSE:To improve the reliability of a system by detecting the runaway of the software, bringing all software into an initializing routine and resetting and initializing the system. CONSTITUTION:Plural watchdog timer (WTD) reset output sections 11-1, 11-2- 11-n are provided. A WTD reset signal R11 is outputted from the WDT 11-1 by timer interruption at each prescribed time based on the processing routine for timer interruption. A reset signal generated at each end of tasks (1)-N is outputted from the outer WDT 11-2-N. If runaway occurs in the software and there exists no timer interruption or task end, high level signals are outputted from timers 12-1, 12-N and the signals are given to the software and system as reset signals through an OR circuit 14. Thus, each software is brought into the initialize routine and the system is reset and initialized.</p>
申请公布号 JPS59158454(A) 申请公布日期 1984.09.07
申请号 JP19830032419 申请日期 1983.02.28
申请人 TOSHIBA KK 发明人 ITOU TOMOJI
分类号 G06F9/48;G06F1/24;G06F11/00;G06F11/30 主分类号 G06F9/48
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