| 摘要 |
<p>PURPOSE:To simplify the circuit and to change a program signal to be generated only with the change of contents of a memory by storing a data corresponding to the program signal of plural channels in advance in the memory and reading it as time is elapsed. CONSTITUTION:In a signal generating circuit 11 capable of parallel output, 12 is an oscillator generating a clock signal, 13 is a counter counting the clock and generating a count value signal 131 in parallel n-bit at each count, 14 is an ROM addressed sequentially by the signal 131, and an m-bit parallel output 141 is generated at each address. In the circuit 11, 15 is a latch holding the signal 141 for one clock time only. Each data of each control signal is stored in each address of the ROM14 as one group and each bit of the m-bit data corresponding to each address becomes a data at a timing at which each signal exists. Further, two bits in an output 16 are used as clear signals a, a' of the counter 13, and remaining bit outputs other than the 2-bit are extracted as various signals.</p> |
