发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To contrive to enhance the degree of integration of a semiconductor memory device by a method wherein a part of a floating gate is arranged on a diffusion region for control interposing a thin insulating film between them. CONSTITUTION:An N<+> type source region 23, an N<+> type drain region 24, an N<+> type diffusion region 25 for a bit line, and an N<+> type diffusion region 26 for control to be connected to a control gate 33 are formed in the element region of a P type Si substrate. A floating gate 29 is formed on a channel region between the regions 23, 24 thereof and on a part of the region 26 interposing respectively thin oxide films 27, 28 between them. Moreover, the gate 33 is formed on the gate 29 interposing an oxide film 32 between them, and the gate 33 is connected to the region 26. According to this construction, because the sum total of capacity between the region 26 and the gate 33 and capacity between the gate 33 and the gate 29 becomes to capacity corresponds to capacity between the gate 33 and the gate 29, the area of the overlapped part of the gate 29 and the gate 33 can be reduced, and the degree of integration can be enhanced.
申请公布号 JPS59155967(A) 申请公布日期 1984.09.05
申请号 JP19830030351 申请日期 1983.02.25
申请人 TOSHIBA KK 发明人 MIYAMOTO JIYUNICHI;IIZUKA TETSUYA
分类号 H01L27/112;G11C14/00;H01L21/8246;H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L27/112
代理机构 代理人
主权项
地址