发明名称
摘要 <p>PURPOSE:To simplify a phase adjustment of clocks at respective parts of a computer by sending a pair of an echo clock signal and distribution clock to a logic unit and by measuring and asjusting them returned at a time. CONSTITUTION:When basic clock CO from crystal oscillator 1 returns to gates 5 and 7 after passing through gates 4 and 6, a phase difference between points A and B is twice that of a clock measured by the input of units K5 and K6 if gates 4 to 7 are equal in delay time and the delay time of transfer signal line of echo clocks C3 and C4 is uniform. For the purpose, adjusting delay lines DL3 and DL4 to equalize a half of the phase difference of the output between points A and B makes it possible to equalize the phase differences of units K5 and K6 including logic circuits 2 and 3.</p>
申请公布号 JPS5936769(B2) 申请公布日期 1984.09.05
申请号 JP19780096984 申请日期 1978.08.09
申请人 MITSUBISHI ELECTRIC CORP 发明人 NOJI TAMOTSU
分类号 G06F1/10;G06F1/04 主分类号 G06F1/10
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