| 摘要 |
An input buffer circuit for translating TTL level inputs to CMOS levels and which constitutes a part of a monolithic semiconductor device is provided. An input inverter stage has the source of its load transistor connected via a bipolar transistor to a first voltage level. When a second voltage level at which the monolithic semiconductor device is intended to operate exceeds the first voltage level, an MOS transistor coupled in parallel with the bipolar transistor bypasses the bipolar transistor and connects the source of the load transistor directly to the first voltage level, thus eliminating the VBE drop of the bipolar transistor. The bypass means compensate for the body effect of the load transistor and maintain the switch point of the input inverter stage at a relatively constant point.
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