| 摘要 |
PURPOSE:To perform reexecution at the detection of abnormality and initializing after various diagnoses easily, to reduce the load of an operator and to attain initializing based upon the convenience of firmware by generating a system clear signal by firmware. CONSTITUTION:The system clear signal is formed through the firmware. If a system microinstruction is sent from the firmware, a signal SSYCLR1 obtained by decoding said microinstruction activates an output signal CLRSTPO of a gate 23 to stop the supply of a system clock. On the other hand, an FF 22 is set up synchronously with a free running signal SYN1, a signal FSYCLR1 is generated, the Q output RCLR1D1 of an FF 211 in a register 21 is set up and then the Q outputs of FFs 212, 213 are successively set up. During the period from the setting of the Q output of the FF 211 to the setting of the Q output of the FF 212, the system is initialized. |
