| 摘要 |
PURPOSE:To prevent generation of an abnormal pulse even if an input signal is changed by applying a digital input signal to a D flip-flop in order to synchronize a modulating pulse of a high frequency with a modulation pulse of a low frequency and outputting the input signal to an output Q of the FF when the low frequency pulse is triggered. CONSTITUTION:An output of an oscillating circuit 2 is frequency-divided by a counter 1 and the modulating pulse fH having a high frequency and the modulation pulse fL having a low frequency being a division of integral number of the high frequency. A transmission signal S is synchronized with the modulation pulse fL of the low frequency at the D-FF3. The output Q of the D-FF3 and the modulation pulse fH are inputted to an AND gate 4, an output Q' of the D-FF3 and the modulation pulse fL are inputted to on AND gate 5, and the output of the AND gates 4, 5 is transmitted through a OR gate 6. |
