发明名称 IDENTIFICATION SYSTEM OF SYNCHRONIZING PATTERN
摘要 PURPOSE:To attain a comparatively simple circuit constitution regardless of the number of fields per block and without reduction of the reading speed, by storing previously the synchronizing pattern of a field to be identified into the 2nd register and then comparing this pattern with a synchronizing pattern read out of a memory medium. CONSTITUTION:A microprocessor 4 stores a synchronizing pattern of a field where the address of a block to be read into the 2nd register 5. The synchronizing patterns of each field read out of a memory medium are supplied successively and in series to a shift register 7 and then delivered in parallel to a comparator 6. The comparator 6 generates an identification signal S when the coincidence is obtained the synchronizing pattern stored in the register 5 and that obtained from the register 7. The processor 4 detects the identification signal generated from the comparator 6 via a register 8 and then stores the synchronizing pattern of the field to be read next into the register 5. Then the field is read and the synchronizing pattern is supplied to the register 7, and the comparator 6 produces the identification signal S.
申请公布号 JPS59152507(A) 申请公布日期 1984.08.31
申请号 JP19830025718 申请日期 1983.02.18
申请人 FUJITSU KK 发明人 HANAOKA YASUHIKO;MOROTO KIYOO
分类号 G11B20/10;G11B27/19 主分类号 G11B20/10
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