| 摘要 |
PURPOSE:To prevent racing by connecting a synchronism type NOR gate and a clocked inverter in cascade and providing the synchronism gate to the post-stage of the clocked inverter and the pre-stage of the NOR gate. CONSTITUTION:When there are a phase difference in clock signals phi, -phi, and a signal A0 is changed from 0 to 1 level, an MOSFET 33 in the NOR gate 26 is made conductive and an MOSFET 31 is interrupted. Since an MOSFET 36 in the gate 26 is interrupted in synchronizing with the signal phi, even if the FET33 is conductive, an output signal C' of the gate 26 is kept to 1 level. Thus, the signal A is kept to 0 level and the malfunction due to racing is prevented.
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