发明名称 ETCHING METHOD FOR LAYER OF IRREGULAR THICKNESS
摘要 PURPOSE:To prevent the generation of a wiring pattern short-circuit or disconnection by a method wherein, when an etching is peformed on the layr to be etched of irregular thickness, the part other than the layer to be etched is coated by a resist pattern, and an etching is performed separately on the above. CONSTITUTION:The first wiring patterns 3 and 4 are formed on an insulating substrate 1, an insulating film 2 is covered on the region other than the part where a contact hole 7 is formed, and the second conductor layer 8 is coated on the layer 2. Then, the first photoresist layer 10 is adhered on the patterns 3 and 4 exposed on the layer 8 and the inner part of the hole 7 in such a manner that the layer 10 will be formed in one body with the patterns 3 and 4, an etching process is performed on the layer 8, the layer 10 is removed, and wiring patterns 5 and 6 are partially formed at the stepped part. Subsequently, the second photoresist layer 11 is provided on the wiring pattern forming part located in the flat part and the entire stepped part, and after an etching has been performed on the layer 8, the layer 11 is removed, and complete wiring patterns 5 and 6 are obtained on the wiring patterns 3 and 4 through the intermediary of the insulating film 2.
申请公布号 JPS59151431(A) 申请公布日期 1984.08.29
申请号 JP19830025648 申请日期 1983.02.18
申请人 FUJI XEROX KK 发明人 KIKUCHI MASAJI;IKEDA CHIKAO
分类号 C23F1/00;H01L21/302;H01L21/306;H01L21/3065 主分类号 C23F1/00
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