| 摘要 |
PURPOSE:To contrive the fine formation of the element, the stabilization of the threshold value, and the reduction of the manufacturing cost by forming a channel stopper region and a field region in self-alignment manner. CONSTITUTION:A thermal oxide film 32, an oxide film 33, a positive resist layer 34, and a negative resist layer 35 are successively formed on a p type Si substrate 31, which are then selectively exposed to light with ultraviolet rays. Using the developer for negative resist, a negative resist pattern 36 is formed and a p type impurity is ion-implanted, thus forming the p<+> type channel stopper region 37. A positive resist pattern 38 is formed by using the developer for positive resist, the oxide film 33 and the thermal oxide film 32 are selectively removed, and thus the field region 39 is formed. An oxide film 40 and a poly- crystalline Si layer 41 are formed; a gate electrode 42 is formed by patterning and a gate insulation film is formed by etching. The source and drain regions 44 and 45 are formed by ion-implanting an n type impurity, and Al wirings 49 and 50 are formed, thus forming an MOS type transistor. |
