发明名称 Counting method and apparatus
摘要 Integrated circuits contained in a rail are passed through cylindrical electrodes. Two electrodes are connected to an oscillator to transmit out of phase fields. A receiving electrode's output has the residual oscillator frequency component removed by a nulling network and summation device, whose output is fed to a band pass amplifier and balanced demodulator, which receives a phase shifted input from the oscillator. Demodulator output components at and above the oscillator frequency are removed by a low pass filter. A demodulator output above the reference voltage triggers a counter.
申请公布号 US4468795(A) 申请公布日期 1984.08.28
申请号 US19820342028 申请日期 1982.01.22
申请人 GERIG, JOHN S. 发明人 GERIG, JOHN S.
分类号 G06M1/10;G06M9/00;H01L23/544;(IPC1-7):G06M9/00 主分类号 G06M1/10
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