| 摘要 |
PURPOSE:To vary the processing accuracy in response to the effective accuracy of input data by dividing electrically plural adders into plural blocks and making independent operations possible among these divided blocks. CONSTITUTION:An input signal of b bits is supplied to X and Y inputs when a control input terminal 6 is set at a high level. Then the partial integrations produced from banks 7-10 are added as they are, and an arithmetic result of 46 bits is delivered to an output P. When the terminal 6 is set at a low level, the outputs of gates 11-1-11-4 are set at 0. Therefore, the output of the bank 8 is set at 0, and at the same time the outputs of gates 12-1-12-4 are simultaneously set at 0. Therefore the output of the bank 7 is not transmitted to the bank 9. As a result, partial integrations [XlXYh] and [XhXYl] are set at 0, and [XlXYh] are delivered independently to the output although said partial integrations are added as they are. In other words, two systems of parallel multipliers which deliver 8 bits with an input of (4X4) bits are actuated independently of each other. |
