| 摘要 |
PURPOSE:To reduce the number of contacts, and to miniaturize and integrate a semiconductor device containing an inverter circuit by using an enhancement type transistor as an Mo gate and a depletion type transistor as an Al gate. CONSTITUTION:An Mo layer is formed on the whole surface of a P-type silicon substrate 9, an Mo gate electrode 17 is formed on a gate oxide film 13 in a transistor region 11, which must be formed to an enhancement type through etching, while an Mo mask 18 coating a gate oxide film 13 in a residual transist or region 11, which must be formed to a depletion type, and Mo wiring 19 are formed, N-type As<+>, P<+>, etc. are implanted and source-drain regions 14 in the transistor region 11, which must be formed to the enhancement type, are formed again through self-alignment, and gate length is determined. An inter-layer insulating film 20 is formed on the whole surface of the substrate 9, the insulating film 20 on the Mo mask 18 and the Mo mask 18 are removed, and an N type impurity, such as As<+>, P<+>, etc. is implanted through the gate oxide film 13 to form the transistor region 11 to the depletion type. Al Wirings 23 to the source-drain regions 14, etc. are formed while an Al gate electrode 24 is formed on the gate oxide film 13 in the depletion type transistor region 11. |
