发明名称 |
ANALOG SIGNAL SWITCHING CIRCUIT |
摘要 |
PURPOSE:To reduce the switching settling time of the 1st switch group remarkably by providing the 2nd switch opened only at the switching of a channel of the 1st switch group and holding an analog signal by a capacitor while the 2nd switch is opened. CONSTITUTION:A switch 2 is opened when the contact of a switch is changed over from the S1 into the S2. Then, a voltage Es1 is stored in a holding capacitor 5. Since the voltage Es1 is changed into a comparatively smaller level difference, from Es1 into Es2 in the process of the change in an output voltage E0' of the switch 2 when the switch 2 is closed again, the level change is such a small value that the delay due to the time constant comprising the floating capacitance and a conductor resistance does not give any problem. Thus, the setting of the voltage E0' at the changeover of the switch 1 is attained at high speed. The same operation is repeated afterward until an analog signal of the n-th channel is switched. This output voltage E0' is converted in terms of impedance by a buffer amplifier 6 and a final analog output with low impedance is obtained. |
申请公布号 |
JPS59147533(A) |
申请公布日期 |
1984.08.23 |
申请号 |
JP19830019811 |
申请日期 |
1983.02.10 |
申请人 |
HITACHI SEISAKUSHO KK;HITACHI MEDEIKO:KK |
发明人 |
MAIO KENJI;MORIYA ATSUSHI |
分类号 |
G01N23/04;A61B6/03;H03K17/00;H03K17/62 |
主分类号 |
G01N23/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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