| 摘要 |
PURPOSE:To reduce an offset potential of the titled circuit by applying a bias potential from a common DC source to each base of transistors (TRs) for input converting circuit and providing a negative feedback loop to one base of a differential pair so as to make the current value of the differential pair equal at all times. CONSTITUTION:A current mirror circuit is constituted of the 1st and 2nd TRs 8, 13 and this circuit is taken as a load circuit for an emitter matching differential amplifier circuit comprising the pair of TRs 6, 12. The potential of the collector is fed back to the base of the TR12 via a resistor 14, a TR17 and a resistor 15. Further, the emitter of TRs 3, 20 for converting input is connected to the base of the TRs 6, 12 via resistors, 5, 18 and a voltage of a common bias power supply 22 is applied to the base of the TRs 3, 20. Further, diodes 10, 11 are connected in the same polarity in parallel between collectors of the TRs 6, 12. Then, the current value of the differential pair is made always equal and the DC offset potential of an amplitude limit circuit is decreased. |
