| 摘要 |
PURPOSE:To eliminate the effect of heat treatment, etc. on threshold voltage, and to improve reproducibility and controllability by forming a field-effect transistor so that the impurity concentration on the surface of a channel section brings a predetermined region. CONSTITUTION:SiO2 13 and further Si3N4 14 are formed on an n type silicon substrate 11 on which an n type epitaxial layer 12 is grown. A resist pattern is formed, only Si3N4 14 is etched, SiO2 13 is etched to bore an opening, and SiO2 13 is further etched, and an eave section of Si3N4 14 is formed. When B<+> ions are implanted, a p layer 16 is formed to the lower section of the eave. When As<+> ions are implanted, an n<+> layer 17 is formed outside the eave. Maximum impurity concentration NAmax in the P layer 16 is equalized under the eave of the Si3N4 14. |
