| 摘要 |
PURPOSE:To improve the dielectric strength of a planar type P-N junction significantly by controlling an impurity density distribution efficiently regardless of the diffusion depth. CONSTITUTION:A high density N<+> type impurity layer 5 is formed by diffusion from both sides of an N<-> type silicon wafer and an N+ type diffusion layer is completely removed from one side of the wafer 1 to form a mirror surface and the N<->-N<+> type wafer, whose N<-> layer is approximately 80mum thick, is obtained and an active junction is formed to its N<-> layer. The wafer 1 is thermal- oxidized in a high temperature furnace and a silicon dioxide layer 2 is formed on the surface of the N<-> layer. The wafer 1 is thermal-treated by the 2nd high temperature furnace and the 1st diffusion region, that is, a base region 3 of an NPN transistor is formed through an aperture of the silicon dioxide film 2. The boron density near the surface of the base region 3 is about 0.5-1.0X10<17>cm<-3> and the maximum density domain is formed inside the bulk. The diffusion depth is also controlled to about 15mum. Moreover, an N<+> type impurity region 7 which is to be an emitter region is formed in the base region 3 and each electrode layer 8 is also formed in the base region 3 through a surface insulating film. |
