发明名称 |
Communication adapter circuit |
摘要 |
A communication adapter circuit (10) is connected to a processor through a data bus (12)and a control bus (14). Data and control signals are provided through the buses (12,14) to a timer circuit (18), a programmable peripheral interface circuit (20), an asynchronous and bisynchronous control circuit (22) and an SDLC/HDLC control circuit (24). Each of the control circuits (22, 24) includes parallel-to-serial and serial-to-parallel conversion circuitry. A clock select circuit (32) operates in conjunction with the timer circuit (18) and the programmable peripheral interface circuit (20) to establish a data transmission rate for the data flow through the adapter circuit (10). From the control circuits (22, 24) the data is transmitted through a bi-directional serial line (44) to a dual modem switch (56). From the switch (56) the data is transmitted to either an EIA interface circuit (60) to a conventional modem or through a line (64) to an internal modem.
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申请公布号 |
US4467445(A) |
申请公布日期 |
1984.08.21 |
申请号 |
US19810274300 |
申请日期 |
1981.06.16 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MUELLER, MARK W.;PARKER, THOMAS S.;BENIGNUS, DOUGLAS M.;FRYE, JAMES L. |
分类号 |
H04L29/06;G06F13/00;G06F13/38;H04L7/00;(IPC1-7):G06F3/00;G06C9/00 |
主分类号 |
H04L29/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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