| 摘要 |
A pulse monitor circuit which detects pulse failures through use of a detection circuit and a storage circuit. The detection circuit detects failure of the monitored pulses after being periodically reset by an external reference pulse train. The storage circuit is clocked by the reference pulses and operates to store the output signals of the detection circuit. Upon detection of a pulse failure to monitor can be cleared by external control or detection of a monitored pulse.
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