BIPOLAR MOS SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF

摘要

PURPOSE:To reduce a p-n junction area and to simultaneously improve the withstand voltage yield by forming a p-channel MOSFET in an n type insular region surrounded by a p type isolating region or p type well. CONSTITUTION:A p type isolation layer 3a to a p type substrate 1 is formed to surround an n type Si region formed with p-channel MOSFET, and a p-channel MOS region is formed in n type island. In this manner, a p-n junction which has a relation to the withstand voltage of the p-n junction to the entire MOS region can be reduced to the p-channel MOS region.