| 摘要 |
PURPOSE:To increase the width of a clock pulse voltage which can be transferred by a method wherein a current restricting resistor is connected between a clock pulse supply source and the clock pulse input terminal, and, in addition to the input terminal, at least one or more of current sources are provided. CONSTITUTION:The current restricting resistor 1 is connected between clock pulse supply source 2 and the titled device 3, and, in addition thereto, the emitter of an NP- transistor Q1 is connected to said terminal of the device 3 via a resistor R1. Power sources V2 and V1 are kept connected to the base and the collector of the transistor Q1, respectively. When constructed in such a manner, since a stationary current is supplied from the transistor Q1, clock line current reduces on the decreasing the clock voltage, and the voltage which determines the lower limit the clock pulse which can be transferred increases. Therefore, the conventional defect such that the lower limit of the transferrable clock pulse region rises is alleviated. |
