| 摘要 |
PURPOSE:To ensure an application of a region related to the update of data of a main memory by another information processor with high efficiency, by dividing the display of an address on a main memory into upper and lower digits and providing plural sets of buffer memories having addresses of the same number as those which can be indicated by said lower digits of the address. CONSTITUTION:When an address (b<2>) is set to an address register 4'', (b) exists in the entry of an address 2 of an index register 9'. Therefore the contents of the address 2 of a buffer memory 8' corresponding to the (b) correspond to ''LM'', and the corresponding validity display bit is set at ''0''. In addition, if the bit corresponding to the address 2 of a register 10 is set at ''0'', this bit is rewritten to ''1''. As a result, the data of a main memory 6'' are loaded to the entry of the address 2 of the memory 8' when the next loading is carried out to the address 2. Thus the entry data of the address 2 of the memory 8' remains. |
