发明名称 DELAY TIMER
摘要 PURPOSE:To shorten a resetting time required to cut off a source voltage and reset a timer circuit, by providing nearly a capacitor which has large capacity and applies a charging voltage to a relay. CONSTITUTION:When the charging voltage of a capacitor CT attains to a specific threshold level, the timer circuit 1 finishes time clocking operation and supplies a gate trigger signal to a tyristor 2, which turns on a predetermined time after the power source is turned on and then holds itself thereafter, so that the relay Ry is driven continuously by the charging voltage of a capacitor C2. The capacity of the capacitor C2 is small, so the charging voltage of a cpacitor C1 is reset to zero instantaneously. Therefore, the resetting time is shortened to about 5 msec.
申请公布号 JPS59140724(A) 申请公布日期 1984.08.13
申请号 JP19830014141 申请日期 1983.01.31
申请人 MATSUSHITA DENKO KK 发明人 KITAMURA YASUSHI;FUKUTAKE KATSUHIKO
分类号 H01H47/18;H03K17/28;H03K17/292 主分类号 H01H47/18
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