发明名称 PULSE SYNCHRONIZER FOR CONTROLLING MOTOR
摘要 PURPOSE:To prevent the erroneous counting by synchronizing the four signals of command pulse signals of A-phase signal, B-phase signal, normal rotation command pulse signal and reverse command pulse signal of a pulse generator with the four signals displaced in the phases. CONSTITUTION:An input pulse from a normal command input terminal 1 is synchronized by a rise detector 3 with phi1 synchronizing signal 5. An input pulse from the reverse command input terminal 2 is synchronized with phi3 synchronizing signal by a rise detector 4. A rise detector 17 outputs a signal synchronized with phi4 synchronizing signal 8 to an AND circuit 19, and a fall detector 18 outputs a signal synchronized with phi2 synchronizing signal 6 to an AND circuit 20. Since the phi1-phi4 synchronizing signals are displaced in the phases, the signals are not inputted to the counter 11 simultaneously or in superposed manner, and are not erroneously counted.
申请公布号 JPS59139881(A) 申请公布日期 1984.08.10
申请号 JP19830012614 申请日期 1983.01.31
申请人 TAKAHASHI YOSHITERU 发明人 KOBAYASHI HIDEKI;KAWABE HIROMITSU;HIRANO NORIMITSU
分类号 H02P29/00;G05D13/62 主分类号 H02P29/00
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