| 摘要 |
PURPOSE:To vary a delay time stepwise by switching stepwise the oscillation period of an oscillator which generates a shift clock for an analog shift register. CONSTITUTION:The oscillator consists of a delay line 1, FET3, delay lines 5, 6, and 7, switches 8, 9, and 10, FET12, etc. The switches 8, 9, and 10 short-circuit the delay lines 5, 6, and 7 individually and the oscillation period is twice as long as the sum of the delay times of the delay line 1 and the delay lines 5, 6, and 7 which are not short-circuited. The output phiA of the FET12 is inverted by an FET14 to generate a clock phiB and both clocks phiA and phiB are supplied as shift clocks to the analog shift register 16. The switches 8, 9, and 10 are turned on and off selectively to switch the clock period stepwise, varying the delay time stepwise. |
