发明名称 DIRECT MEMORY ACCESS CONTROLLER
摘要 PURPOSE:To realize a function to transfer continuously data blocks by providing a circuit to which the head address of each of plural memory blocks are set and a circuit to which the number of data transferred within each block is set. CONSTITUTION:The head address of a data block group to be used as a source is set at a source address register 11; while the head address of a memory region to be used as a destination is set at a destination address register 12. At the same time, the number of data within the data block is set at a base counting register 31 and a counting register 13 respectively. The number of transferred blocks is set at a block counting register 32, and the fixed address displacement between data blocks is set at a displacement register 33. An adder 34 which generates an address during a direct memory access operation functions as an incrementer during transfer of data and then as an adder when the head address of the next data block is delivered from an optional data block.
申请公布号 JPS59136830(A) 申请公布日期 1984.08.06
申请号 JP19830010738 申请日期 1983.01.26
申请人 NIPPON DENKI KK 发明人 TAKAHASHI TOSHIYA
分类号 G06F13/28 主分类号 G06F13/28
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