发明名称 DIGITAL SWITCH ANALOG SIGNAL ADJUSTOR
摘要 A digitally switched analog signal conditioner comprising a plurality of pairs of input terminals, a junction, and an output terminal; a plurality of capacitors, first ends of the capacitors being connected to the junction; a plurality of switches being arranged in pairs, first ends of each pair being connected to the other ends of different ones of the capacitors, the other ends of each pair being connected to respective ones of a pair of input terminals, the switches of each pair being adapted to be operated alternatively; an amplifier having an input and an output, the input being operatively coupled to the junction; and a sample and hold circuit operatively coupled to the output of the amplifier for periodically sampling and holding the output, the output of the sampling and holding circuit being connected to one of the input terminals of one of the pairs of input terminals, the other of the terminals of the one pair of input terminals being connected to a point of reference potential.
申请公布号 JPS59136869(A) 申请公布日期 1984.08.06
申请号 JP19830244398 申请日期 1983.12.26
申请人 INTAASHIRU INC 发明人 DEBITSUDO BINGAMU;RII RERANDO EBANZU;PIITAA DANKAN BURATSUDOSHIYOU
分类号 G06G7/12;G06G7/14;G06G7/161;G06G7/186;H03F3/45 主分类号 G06G7/12
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