| 摘要 |
<p>PURPOSE:To reduce a data rewrite time by erasing a data of a memory cell only when a data written newly is different from the data written already in the address location and writing a new data to save the time required for the write of data without change. CONSTITUTION:When an input data is coincident with a read data, no rewrite of data is executed and the time required for the erase and write is omitted. When the input data is not coincident with the read data, an output of a gate circuit 9 goes to a high level and an erase circuit 10 is operated. Then, the data in a memory cell corresponding to the address signal applied for the case is erased by 8-bits at the same time. Then, a write circuit 11 is operated by a pulse outputted from the erase circuit 10 at the end of data erase so that the new input data is written in the erased memory cell. Thus, the rewrite time reguired for the entire EEPROM device is reduced remarkably.</p> |
