发明名称 |
ERROR CORRECTOR FOR BINARY DATA |
摘要 |
PURPOSE:To enable error detection and correction of check words by dividing data to plural blocks wherein respective blocks have main plural data words and additive plural check words and leading out a parity block. CONSTITUTION:A segment has 96 or 102 scanning lines and has further 6 vertical partity words in association therewith. The whole words of the respective scanning lines from 0 to 95 or 101 of the segment are successively supplied to the input 1 of a vertical parity word generator. The input 1 is connected to one input of an exclusive-OR circuit 2 and one input of a 2:1 selector 3. The selector 3 is so controled as to supply the data or the generated vertical parity words. When the vertical parity words are supplied to the selector 3, a latching circuit 4 is cleared and the content of a delay circuit 5 is cleared as well for the purpose of accepting the data of the next segment. |
申请公布号 |
JPS59135605(A) |
申请公布日期 |
1984.08.03 |
申请号 |
JP19830238691 |
申请日期 |
1983.12.16 |
申请人 |
SONY KK |
发明人 |
JIEEMUZU HETSUDOREE UIRUKINSON |
分类号 |
G06F11/10;G11B20/18;H01F5/00;H03M13/00;H03M13/15;H04N5/945 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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